An image capturing apparatus uses a complementary metal oxide semiconductor (CMOS) image sensor or a charge coupled device (CCD) image sensor, and the number of pixels of the image sensor is being increased to acquire a high-definition captured image. Hence, electric power consumption increases as the number of pixels increases, in a drive circuit and a signal processing circuit of the image sensor.
Hence, for example, in Patent Literature 1, decimation is performed by summing a plurality of pixels to generate one pixel at the image sensor at the time of capturing a moving image, in order to reduce the electric power consumption. Also, in Patent Literature 2, a plurality of operation modes of an analog/digital (A/D) conversion process are prepared, and the operation mode of the minimum power consumption is selected on the basis of pixel information given in advance.